Decompressor for hardware applications

The use of lossless compression in the application specific computers provides such advantages as minimized amount memory, increased bandwidth interfaces, reduced energy consumption, and improved self-testing systems. article discusses known algorithms with aim choosing most suitable one for implementation a hardware-software decompressor. Among them, Lempel-Ziv-Welch (LZW) algorithm makes it possible to perform associative memory decompressor dictionary simplest way by using sequential reading symbols decompressed word. analysis existing hardware implementations decompressors showed that main goal their development was increase at expense increasing costs limited functionality. It is proposed implement LZW module based on microprocessor core specialized instruction set. For this, processor stack architecture selected, which developed authors tasks file grammar analyzing. Additional block storing an input buffer converts byte stream packed into sequence unpacked codes are added it. set adjusted both speed up decompression reduce costs. described Very high-speed integral circuit Hardware Description Language implemented field programable gate array (FPGA). At clock frequency two hundred megahertz, average throughput more than ten megabytes per second. Because software implementation, developed, has approximately same lower flexibility, multifunctionality, provided software. In particular, Graphic Interchange Format files basis this device FPGA dynamic visualization patterns embedded system display